High frequency capacitance measurements on metal-insulator-semiconductor structures in thermal non-equilibrium condition

We simulate the charge carrier traffic between the energy bands and the interface states in structures like Al/SiO₂/6H-SiC, Al/diamond/Si and Al/SIPOS/Si to explain their high frequency capacitance-voltage behavior. The structures have in common that traditional electrical measurement techniques performed at room temperature are prone to thermal non-equilibrium effects. This can result in large errors in the interface data extracted from such studies when thermal equilibrium conditions are assumed. In this work, high frequency capacitance-voltage data are compared to numerical simulations which include such thermal non-equilibrium conditions to enable more accurate estimates of interface state parameters in above-mentioned structures.