Abstract
Low temperature electrical characterization of ultra thin oxide MOS capacitors with p+ poly-Si1-xGex and poly-Si gate is performed. The investigated structures are suitable for future nano-scaled high speed MOSFET. The aim of this study is to compare the low temperature performance of poly-Si1-xGex and poly-Si gate MOS structures in the nanoscale channel length regime. Apart from the significant change in the flat band voltage, the result shows that the accumulation capacitance of these MOS structures decreases with temperature. Though this is not significant, there is a consistency seen with respect to the temperature for poly-Si and poly-Si1-xGex gated MOS capacitors. In addition the observed results are different from the metal gated MOS structures.
| Original language | English |
|---|---|
| Pages (from-to) | 668-671 |
| Number of pages | 4 |
| Journal | Proceedings of SPIE - The International Society for Optical Engineering |
| Volume | 4746 I |
| Publication status | Published - 2002 |
| Event | Physics of Semiconductor Devices - Delhi, India Duration: 11 Dec 2001 → 15 Dec 2001 |
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